In this paper, A new customized multi-level inverter (MLI) configuration is proposed for induction motor drive, aiming to lower the requirement of DC bus voltage magnitude. This method utilizes pole pair winding coils separately to generate multi-level voltage waveform across the total stator phase windings. As the inverter requires lower input voltage it eliminates the requirement of boost converters when it is used in the EV applications. The inherent advantages of this topology significantly reduce control complexity in the battery systems by reducing the number of series-connected battery cells. The conventional Level-Shifted Sine Triangle PWM technique proficiently shifts low-frequency harmonics to the carrier frequency, enhancing power quality and minimizing electromagnetic interference. Through MATLAB simulation, this new customized multi-level inverter-fed open-end stator winding Induction motor is simulated and results are presented to validate the proposed concept. Ultimately, our research aims to contribute to advancing electric vehicle technology by operating the induction motor with minimal input DC source voltage, and substantial output gain.

This work presents the power factor correction (PFC) buck-boost converter for on-board electric vehicle (EV) charging applications. The PFC buck-boost converter is designed to operate in discontinuous current conduction mode (DCCM), thus achieving natural PFC for the universal input voltage range. In addition, DCCM operation does not require input voltage or current sensors; as a result, the control is more reliable and economical than continuous current conduction mode (CCCM). Furthermore, the buck-boost converter switch operates in zero current switching (ZCS) which results in reduced switching losses and improves the efficiency. The detailed steady-state analysis, operating modes, and design analysis for DCCM operation are presented. To validate the theoretical studies, a closed-loop voltage mode control of the PFC buck-boost converter is developed and tested in a PSIM software environment. The simulation results uphold the converter analysis and achieve a high power factor and low total harmonic distortion (THD) for the universal input range.

The equivalent circuit of a voltage source inverter (VSI) fed brushless DC (BLDC) motor is similar to a buck converter supplied brushed DC motor. This analogy derives a linear relationship between the duty ratio and motor speed for continuous current conduction mode (CCCM). However, this relationship is not linear for discontinuous current conduction mode (DCCM), which is not generally considered in literature while controllers are designed. The DCCM of the BLDC motor driven by unipolar pulse width modulation (PWM) controlled voltage source inverter is analyzed, and corresponding quasi-steady-state model is derived in this paper. The motor speed can be precisely determined by simple computations with the proposed DCCM model, which can lead to complexity reduction in controller design. The effectiveness of the proposed model has been validated by the simulation and experimental analysis.

In this paper, a customized multi-level inverter configuration designed for driving an induction motor with multiple pole pairs is introduced. Within the induction motor, each pole pair winding coil spaced 360° (electrically) apart maintains the same voltage profile. In our case, two windings in a four-pole induction motor are deliberately disconnected. A dual two-level inverter is used to power each half of the winding, so two such inverters are used to feed the entire stator winding of the induction motor as pole pair windings are disconnected. The single DC source used to power these inverters has a magnitude of Vdc/4, or 25% of input voltage DC bus voltage needed to power a typical Neutral Point Clamped five-level inverter. This new Pulse Width Modulation approach is used to cancel the harmonics at first center band while controlling the inverter output voltage. This method successfully lowers torque ripple by reducing current ripple. Furthermore, power balancing problems are eliminated because the single DC source is supplying the entire topology. The capacitor voltage balancing problems are also resolved because this design is derived using only two-level inverters. Very few changes to the design are needed for the suggested topology; the main change is to disconnect winding coils with the same voltage profile. The efficacy of the proposed inverter employing the innovative PWM technique in the linear modulation region is demonstrated by simulation results utilizing a 5-hp four-pole induction motor in MATLAB (Simulink).

This paper investigates the efficacy of V/f scalar control for a three-phase squirrel cage induction motor (IM) integrated with a proportional-integral (PI) controller and MOSFET-based inverter. The key objective is to achieve robust speed regulation and stability under varying load disturbances. In the present work, two control schemes have been delved (a) the closed-loop approach, offering superior performance but less common in industrial settings, and (b) the widely employed open-loop method. Leveraging MATLAB/Simulink, simulations have been performed to compare the performance of three-level and five-level inverter configurations. To quantify the harmonic content, a comprehensive analysis of total harmonic distortion (THD) has been conducted. The study further incorporates the concept of electric vehicles (EVs), exploring how the proposed control strategy could enhance the performance and efficiency of EV drives.

This paper introduces a 3-emptyset transformerless multilevel inverter fed induction motor drive for agricultural applications. The new platform utilizes a smooth transmitter and removes the current leakage by maintaining a constant normal voltage level. The proposed multi-level inverter has the advantage of low harmonic distortion, low dv/dt and less instantaneous errors. As the input DC power is taken from the PV system, complexity will not be increased even though required number of isolated DC voltages for the multilevel inverter is increasing. The reliability of the system will be increased as power is taken from PV system. The performance of induction motor fed with the proposed inverter is analyzed by applying three types of level shifted sine triangle pulse width modulation techniques PD, POD, APOD. In addition, the proposed topology is able to provide reactive energy to the grid when it connected with grid. The simulation results of the proposed topology are presented to illustrate the performance of the proposed system.

Model Predictive Control (MPC) is a popular control scheme for controlling Voltage Source Converters, due to its fast-transient response and accuracy as compared to traditional hysteresis control. This paper presents a Distribution Static Compensator (DSTATCOM), which utilizes MPC strategy to make balanced and harmonic-free source current such that the power factor is unity at the source end. In addition, DSTATCOM is also used to maintain the load voltage at 1p.u. during voltage swells/sags. Further, this paper demonstrates effective switching of DSTATCOM between the Current Control Mode and the Voltage Control Mode with an objective such that only single DSTATCOM serves for the power quality problems that occur in both current and voltage. MATLAB/Simulink was utilized to verify the proposed scheme and results indicate the improvement in source current and load voltage when disturbances occur in the system.

The FOPID control units for an AVR system with a fractional filter are a unique fractional order. The main responsibility for controlling the reactive power and voltage level is an automated tensile regulator (AVR). PID controller, sensor, exciter, and stabiliser or amplifier are used for the module system. The system is designed according to state-space technology. The proposed controller must have seven independent parameters. A comparison of the published study with optimal adjusted AVR PID and FOPID controls also shows that the proposed controller is superior. The recommended controls derived from the bode analysis with their frequency response characteristics are shown. Finally, the resilience of the controller design is individually examined for both the parameter uncertainties of AVR system and outside storages introduced into AVR system. Given the overall results presented there are clear improvements to the performance of AVR system by a fractional filter in a proposed FOPID controller, and that the AVR system may successfully be applied to the suggested control.

Multi-level inverters are playing a major role in PV based systems because of numerous advantages like low dv/dt, better harmonic pro-file so on. But, conventional multi-level inverters consist of some drawbacks like capacitor balancing issues, greater requirement of ca-pacitor banks and clamping diodes. To address these issues, a novel multi-level inverter has been presented in this paper, which can func-tion as a seven-level, five-level and three-level inverter. The inverter circuit utilizes six switching devices and two isolated DC voltage sources. Moreover, when it is operated as a three-level inverter, a unipolar PWM technique is applied to the circuit which shifts all the lower order harmonics to twice of switching frequency whereas in conventional multi-level inverters, all the harmonics of lower order are present around switching frequency. In addition, proposed inverter can operate even if some switching devices of the circuit fails. Also, the behavior of the inverter during the failure of some switching devices and DC source is analyzed. The proposed inverter is simu-lated in MATLAB/Simulink and the results are also discussed.

Multilevel inverters are more suitable in PV applications due to their numerous advantages like better harmonic profile, low dv/dt and requirement of low voltage rating switches so on. Even though conventional multilevel inverters have many advantages, these configurations have some serious drawbacks like neutral point balancing problem, unequal capacitor voltages and more switching losses due to redundant switching combinations. Moreover, conventional multilevel inverters (NPC or flying capacitor) are not reliable, because the inverter will not function if any one switch fails. To address these issues, a novel 31-level inverter configuration is presented in this paper and it can be operated even any power electronic switching device or isolated dc voltage source fails. In this configuration, 31-level voltage waveform is produced by using four isolated DC sources which will have different voltage magnitudes. Availability of isolated dc voltage sources in PV systems is more common. This inverter circuit is developed by using only 12 switching devices where as a conventional 31-level inverter requires 60 switching devices. Detailed analysis of proposed inverter configuration is presented during the failure of different switching devices/isolated dc sources. MATLAB/Simulink is used to simulate the proposed inverter configuration and results are presented for different fault conditions.

The conventional two-level inverter fed induction motor drive causes pulsating torque because of harmonics present in the inverter output voltage. Therefore, minimization of harmonics content is the major challenge in two-level inverter supplied drives. In this paper, a harmonic reduction technique for multiple pole-pair induction motor drive is presented. A modified carrier based space vector PWM technique is used with suitable phase shift between different (modulating and carrier) signals to cancel the harmonic content. In order to use this PWM technique, each pole-pair winding coil of a four-pole induction motor is supplied with two-level inverters separately as dual inverter fed drives. Two dc voltage sources are used to feed all these two-level inverters and by connecting in proper sequence zero sequence currents can be eliminated. By using proposed PWM technique to the inverter configuration, all harmonics will appear at four times of the switching frequency. The proposed inverter concept is tested with 5hp four-pole induction motor in MATLAB/Simulink and experimentally also verified with laboratory prototype. Simulation and experimental results demonstrate the performance of the proposed inverter topology and also show the improvement in harmonic profile.

Multilevel inverters are gaining more attention in PV applications due to their advantages like better harmonic profile, low dv/dt and so on. But if any one switch of conventional multilevel inverters (NPC or flying capacitor) fails, the entire configuration has to be shut down. In this regard, a multi-level inverter configuration is proposed in this paper which can be operated during the failure of any power electronic switching device/isolated dc source. The proposed configuration is developed by using four isolated DC sources, nine two-quadrant switches and three four-quadrant switches. Requirement of number of switching devices is considerably reduced compared to conventional multilevel inverters. Detailed analysis is carried out to operate the proposed inverter configuration during the failure of different switching devices/isolated dc sources. The proposed configuration is simulated using MATLAB/Simulink and results are presented for different fault conditions. This configuration can be extended to get more number of voltage levels by cascading proposed inverter units.

Multilevel inverters are gaining more attention in ac drive application due to their many attractive features. In the case of conventional neutral-point-clamped (NPC) or flying capacitor multilevel inverter configurations, active switches are connected in series to produce multilevel output voltage waveform. Therefore, if any one switch fails, the entire configuration has to be shut down; this will reduce the reliability of the system. A dual three-level inverter configuration for induction motor drive is proposed in this paper to improve reliability of the system. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules. A level-shifted carrier-based third harmonic injection pulsewidth-modulation technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multilevel voltage waveform is produced across the total motor phase winding, and first center band harmonics are also canceled. Thereby, the torque ripple will be considerably reduced compared with conventional NPC five-level inverter-driven induction motor drive. Finite-element analysis (FEA) is used to estimate the torque ripple when induction motor is supplied by the proposed configuration and conventional five-level NPC inverter configuration to show the effectiveness of the proposed converter. The proposed configuration is simulated using MATLAB/Simulink and experimentally verified using a laboratory prototype with a 5-hp four-pole induction motor drive.

The demand for multi-level inverters is increasing progressively in motor control applications. Many pulse width modulation (PWM) techniques are proposed in the literature and one of the popular modulation methods is unipolar phase shifted carrier (UPSC) PWM. This PWM technique is commonly used in uninterrupted power supply applications where transformer multiple primary windings are connected to two-level inverters. However, this modulation technique is not popularly used in drives applications because a conventional induction motor consists of only two terminals per phase. In this study, a multi-level inverter configuration for four pole induction motor drive is presented, where it is compatible to use the above mentioned PWM technique. By using this multi-level inverter configuration and UPSC PWM technique, all lower order harmonics are shifted to four times the switching frequency, which in turn reduces the torque ripple considerably. The proposed concept is tested on 5hp four-pole induction motor in MATLAB/Simulink and finite element analysis and is also experimentally verified with a laboratory prototype. The simulation and experimental results show the effectiveness of the proposed topology and demonstrate the improvement in harmonic profile and torque ripple.

A multilevel inverter topology for a four-pole induction-motor drive is presented in this paper, which is constructed using the induction-motor stator winding arrangement. A single dc source with a less magnitude when compared with conventional five-level inverter topologies is used in this topology. Therefore, power balancing issues (which are major challenges in conventional multilevel inverters) are minimized. As this configuration uses a single dc source, it provides a path for zero-sequence currents because of the zero-sequence voltages present in the output, which will flow through the motor phase winding and power electronic switches. To minimize these zero-sequence currents, sine-triangle pulsewidth modulation (SPWM) is used, which will shift the lower order harmonics near to switching frequency in the linear modulation region. However, in the case of overmodulation, harmonic voltages will be introduced close to the fundamental frequency. In this regard, a modified SPWM technique is proposed in this paper to operate the drive in the overmodulation region up to the modulation index of 2/surd{3}. The proposed quad two-level inverter topology is experimentally verified with a laboratory prototype on a four-pole 5-hp induction motor. Experimental results show the effectiveness of the proposed topology in the complete linear modulation region and the overmodulation region.

Pole phase modulated (PPM) multiphase induction motor (IM) drives for applications like ship propulsion starts with high pole mode of operation to provide high starting torque required and then switch over to low pole mode of operation for steady run with high speeds. The performance of the nine phase PPM IM drive in case of nine phase four pole operation is inherently good due to high phase number even with a two level inverter. In case of high pole mode of operation (3 phase 12 pole) of the PPM IM drive the torque ripple is not within the acceptable range of safe limits, which brings in the need of multilevel voltage excitation to achieve better performance. Conventional multilevel inverters for nine phase IM suffers with problems such as capacitor voltage balancing issues and considerably high device count. In case of three phase twelve pole operation of the PPM IM drive each phase voltage is the sum of voltage across the three equal voltage profile coils (EVPC). In This paper the advantage of EVPC is exploited to generate a multilevel voltage across each phase using phase shifted carrier PWM keeping the device count same as 2 level nine phase inverter. The effectiveness of the proposed scheme is shown by FEA simulation in ANSYS Maxwell and simplorer environment. Significant reduction in torque ripple magnitude and increase in torque ripple frequency is observed in case of 3 phase 12 pole operation.

A multi-level inverter configuration for 4n pole induction motor drive is presented in this paper. This topology is developed using three two-level inverters and two isolated dc sources. Among these three two-level inverters one inverter is switched at fundamental frequency and remaining two inverters are switched at higher frequency. Two isolated dc sources with equal magnitude are used in this topology to block the path for zero sequence currents. Low frequency operated inverter is connected to one dc source and high frequency operated inverters are connected to other dc source. The magnitude of dc source voltage required in this topology is four times lesser than the dc source required in conventional five-level NPC inverter configuration. The first center band harmonics are cancelled by providing 1800 phase shift between the high frequency carrier signals. This topology can be operated during the failure of any one inverter switches or any one dc source which will increase the reliability of the system. The number of switching devices used in this configuration is considerably less compared to conventional five-level inverters. This configuration is best suitable for high power applications where low frequency operated inverter can use thyristors as switching devices. The proposed topology is simulated in MATLAB/Simulink with (5HP) four pole induction motor and results are presented to show the validity of this configuration.

In this paper, a five-level inverter configuration is presented to improve the voltage and current harmonic profile. This topology is constructed based on the stator winding configuration of a four pole induction motor. Identical voltage profile winding coils of four pole induction motor are disconnected and fed with four two-level inverters. These four inverters are supplied with two isolated dc sources to block the path for zero sequence currents through the motor phase windings. Level shifted carrier based SVPWM is used to produce the gating signals which will increase the dc bus utilization by 15%. Two two-level inverters are feeding one winding and producing three-level voltage waveform. Similarly remaining two two-level inverters are producing a three-level voltage waveform across the other winding. By providing 180° phase shift between carrier waves, multi-level voltage waveform is produced across the total winding and also first center band harmonics are cancelled. The proposed topology is simulated in MATLAB/ Simulink and experimentally verified with 5hp four pole induction motor drive.

In this paper a five-level inverter topology is presented for a four pole induction motor drive with a single DC source. In any ac motor, the winding coils which are 3600 (electrical) apart will have identical voltage profiles. A conventional four pole induction machine consists of two such Identical Voltage Profile Winding Coils (IVPWCs) which are connected in series (or parallel). In the proposed method the series (or parallel) connected IVPWCs are disconnected into two parts. Each IVPWC is fed by a two two-level inverters from both the sides thereby four two-level inverters are used to generate the five-level voltage across the motor phase winding. All these four two-level inverters are connected to the same DC source with a magnitude v/dc (where Vdc is the dc bus voltage required for conventional five-level NPC inverter). Pulses for this five-level inverter configuration is generated using Unipolar phase shifted carrier PWM (UPSC PWM) technique by providing appropriate phase shift between modulating waves and carrier waves independently. Using the advantage of both IVPWCs of the induction motor stator winding and UPSC PWM the harmonics can be shifted to higher order which is close to four times compared to the harmonics with general SPWM. This circuit configuration does not require any major design modifications of the induction motor except the disconnection between the IVPWCs. The five-level inverter configuration supplying a Shp four pole induction motor drive is tested with unipolar phase shifted carrier PWM in MATLAB(Simulink). Although the work is carried with Shp induction motor, results are similar for large machines also. © 2013 IEEE.

In this paper an optimized five-level inverter topology is proposed for a four pole induction motor drive. This topology has developed by using the advantage of two identical voltage profile winding coils per phase in a four pole induction motor. The identical voltage profile winding coils are disconnected and each part of the winding is fed with two two-level inverters from both sides. Thereby four two-level inverters are used to generate five voltage levels on induction motor phase windings. All two-level inverters are fed with single DC link with the magnitude V dc over 4 (where V dc is the dc-bus voltage required for a conventional NPC five-level inverter). Because of the common DC link for all the two-level inverters, common mode currents will find a path through the motor phase windings due to the lack of isolated neutral. To minimize the common mode currents a Sine-Triangle Pulse Width Modulation is used in the proposed topology. Thereby the first dominant harmonics and triplen harmonics shifted near to the switching frequency, which will have a less impact on the motor phase currents. Since the dominant harmonics are less in the proposed topology, it gives almost sinusoidal output voltage which will improve the efficiency of the drive system. The proposed topology does not require any major design modifications of induction motor. The proposed topology is simulated in MATLAB (Simulink) with (5HP) four pole induction motor with sine triangle PWM. © 2012 IEEE.